Altera Nios II for Eye-RIS Camera

AnaFocus has chosen Altera Corporation’s embedded solutions to develop Eye-RIS, a single-chip camera and image processor.

Dr. Angel Rodríguez-Vázquez, AnaFocus,  said:

We chose Altera's flexible Nios II embedded processor for image post-processing and overall system control of the Eye-RIS system because it enabled us to quickly prototype and validate our system

Adding custom control interfaces and I/O ports to the processor using Altera's SOPC Builder development tool allowed us to develop an optimized architecture for the Eye-RIS vision system while meeting our production schedule and cost targets…

By using an Altera FPGA/discrete SIS chip-based development board, AnaFocus was able to quickly create and validate the system architecture for an application with front-end image-processing sensor elements similar to those found in the retina of the human eye.

The 0.18-µm device meets the high-performance control and post-screening video requirements of Eye-RIS’s target applications by using Altera’s Nios II embedded processor integrated with AnaFocus’s smart image sensor (SIS) technology.

Chris Balough, Altera, said:

Eye-RIS is an excellent example of how the design flexibility and performance of our embedded solutions are enabling new innovations in exciting applications such as vision and imaging

It is also evidence of the Nios II processor's ability to easily integrate with other technologies and be efficiently ported to an ASIC implementation

AnaFocus also enhanced Altera's Eclipse-based Nios II Integrated Development Environment (IDE) by adding custom plug-ins and libraries to create a complete image-processing algorithm design and debug environment for developers of Eye-RIS-based vision systems. The end result is an integrated, user-friendly IDE that reduces development time for complex vision processing systems.

By combining SIS technology with the 32-bit embedded Nios II processor core, AnaFocus delivers a high-speed, low-power vision system. SISs differ from CMOS image sensors and CMOS cameras on-chip as image storage and processing circuitry is embedded at the pixel level, intermingled with the sensors where more efficient video processing is carried out.

AnaFocus has developed several generations of SIS architectures but this is the first time a SIS has been used to deliver a single-chip vision system. The high frame rates, low power consumption and reduced size of this system compared to traditional CCD/CMOS image sensor and digital signal processor solution allows video processing to be applied in many applications where previously the size, cost and power consumption were prohibitive. Intelligent automotive airbag deployment systems that adapt to the aspect and number of occupants, security surveillance systems with intelligent cameras that can automatically detect, report and track suspicious activity, and vision-based human-computer interfaces for consumer electronic equipment are some of the possible applications.

Source: AnaFocus